代写C++, python编程、代做data编程设计、c/c++程序语言调试

日期：2020-12-13 12:31

Project:

The goal of this term-project is to implement a simulator of MIPS pipelined processors for handling data hazards. For the implementation, you can use C, C++, python.However, your processor simulator should work as follows:

The execution command of your data hazard handler:

dhh_simulator <input_file_name>

Input: <input_file_name>: the file contains MIPS instruction sequences

In an assembly language level

Only ADD, ADDI, OR, ORI, LW, SW are used

Suppose that only register $1 ~ $8 are used

Example:

Output: <intput_file_name.out>

In the output file, the following information must be contained.

Control signal values at each clock cycle

Considerations

You MUST consider pipeline stalls caused by load-use data hazards

When the signal value is invalid, then write 0

You can change the format of output files

Term-project schedule and submission

„ The compressed file should contain

The source code of your simulator with detailed comments

Documentation (the most important thing!)

It must include all about your implementation

Test input files and outputs which you used in this project

The test input files are not given. You should make the test files, by yourself,which can examine all the token patterns.